Apparatus and method to prevent data loss in nonvolatile memory

ABSTRACT

An apparatus for preventing data loss of a nonvolatile memory device and a method thereof are presented The apparatus includes a nonvolatile memory including a memory cell which writes bit information to a first page and a second page included in a first block using plural states which are implemented using at least 2 bits, and a data-processing unit which writes the bit information of the first page to a second block in the nonvolatile memory while the bit information is written to the second page after the bit information is written to the first page.

CROSS REFERENCE TO RELATED APPLICATION

This application claims priority from Korean Patent Application No.10-2007-0067075 filed on Jul. 4, 2007, in the Korean IntellectualProperty Office, the disclosure of which is incorporated herein byreference in its entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

Apparatuses and methods consistent with the present invention relate topreventing data loss of a nonvolatile memory device, and moreparticularly, to a nonvolatile memory that can represent bit informationof multiple pages using one memory cell.

2. Description of the Related Art

In general, nonvolatile memories are widely used as a storage device tostore and process data in embedded systems, including appliance devices,communication devices, and set-top boxes.

Flash memory, a commonly used nonvolatile memory, can delete and rewritedata electrically, and can be easily adapted to portable devices sinceit has a lower power consumption compared to magnetic disk storagedevices, a fast access time similar to that of a hard disk, and a smallfootprint.

The basic mechanism to store data bits in such a nonvolatile memory is amemory cell. Such a memory cell is composed of a unit field effecttransistor including a control gate, a floating gate, a source, and adrain. In this case, a data bit can be stored by changing thecapacitance of the floating gate to change the threshold voltage of thememory cell. Also, the memory cell is decoded by applying a selectionvoltage through the word line of the control gate.

A typical memory cell provides storage capacity by storing two statesusing one bit. Specifically, “1” denotes deletion and “0” denoteswritten.

A technique to significantly reduce the price per bit for nonvolatilememories was published in the article “A Multilevel-Cell 32 Mb FlashMemory” by M. Bauer in ISSCC Digest of Technical Papers, pp. 132-133,February, 1995. This publication includes a technique storing fourstates using two bits per memory cell.

As described above, a nonvolatile memory having capacity for storingfour states using two bits per memory cell is typically called an MLC(Multi-Level Cell), and data bits for two pages are stored using onememory cell. Also, each of the two pages corresponding to one memorycell is called an LSB (Least Significant Bit) page and an MSB (MostSignificant Bit) page respectively, and data bits are stored startingfrom the LSB page. For example, a two level MLC flash memory implementsfour states including 00, 01, 10, and 11 using 2 bits.

FIG. 1 is a graph illustrating states of a related art two level MLCnonvolatile memory.

As shown in FIG. 1, the typical 2 level MLC flash memory has an initialstate of 11 and the state changes 10 to 00 to 10 in order as the voltageis increased. Thus, in order to make a state of 01 from a state of 11,state sequence 11 to 10 to 00 has to be followed. Also, in each state anupper bit indicates the MSB page and a lower bit indicates the LSB page.

In order to make a state transition from 11 to 01 as previouslydescribed in FIG. 1, while data is written into the MSB page, an errorcan occur in the MSB page as shown by FIGS. 2 and 3, and one state ofthe LSB page can still be changed to 0. Although data is correctlywritten into the LSB page, the data loss of the LSB page can occur dueto the error that occurred when data is written to the MSB page.

In the flash memory management method disclosed by Korean Patent2002-0092487A, when a write to a page which stores valid data isrequested, the write occurs in the log block corresponding the datablock including the page. When another write is requested, the write iswritten to a free page in the log block. However, this patent does notprovide a method to prevent data loss in the LSB page which sharesmemory cells due to an error occurring during data write to the MSB pagein an MLC flash memory.

SUMMARY OF THE INVENTION

Exemplary embodiments of the present invention overcome the abovedisadvantages and other disadvantages not described above. Also, thepresent invention is not required to overcome the disadvantagesdescribed above, and an exemplary embodiment of the present inventionmay not overcome any of the problems described above.

The present invention provides an apparatus to prevent data loss of anonvolatile memory; specifically, in a MLC nonvolatile memory that canprevent data loss of a LSB page due to an error in the MSB page.

The present invention also provides a method to prevent data loss of anonvolatile memory, specifically in a MLC nonvolatile memory, that canprevent data loss of a LSB page due to an error in the MSB page.

The present invention should not be construed as being limited to theabove objects, and the above stated objects as well as other objects,features and advantages, of the present invention will become clear tothose skilled in the art upon review of the following description.

According to one aspect of the invention, there is provided an apparatusto prevent data loss in a nonvolatile memory device, the apparatuscomprising a nonvolatile memory comprising a memory cell which writesbit information to a first page and a second page included in a firstblock using plural states which are implemented using at least 2 bits,and a data-processing unit which writes the bit information of the firstpage to a second block in the nonvolatile memory while the bitinformation is written to the second page after the bit information iswritten to the first page.

According to another aspect of the invention, there is provided a methodto prevent data loss in a nonvolatile memory device, the methodcomprising writing data to a first page in a nonvolatile memorycomprising a memory cell which writes bit information to a first pageand a second page included in a first block using plural statesimplemented using at least 2 bits, and writing the data of the firstpage to a second block of the nonvolatile memory during data writing tothe second page after the data is written to the first page.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other aspects of the present invention will becomeapparent by describing in detail exemplary embodiments thereof withreference to the attached drawings in which:

FIG. 1 is a graph illustrating states of a related art two level MLCnonvolatile memory;

FIGS. 2 and 3 are graphs illustrating errors occurring during data writeto the MSB page shown in FIG. 1;

FIG. 4 is a block diagram illustrating an apparatus to prevent data lossof a nonvolatile memory according to an exemplary embodiment of thepresent invention;

FIG. 5 is a block diagram illustrating the LSB page and the MSB pageaccording to the exemplary embodiment of the present invention;

FIG. 6 is a flow chart illustrating a method to write data to anonvolatile memory according to an exemplary embodiment of the presentinvention; and

FIG. 7 is a flow chart illustrating a method to recover data from anonvolatile memory according to an exemplary embodiment of the presentinvention.

DETAILED DESCRIPTION OF THE INVENTION

Advantages and features of the present invention and methods ofaccomplishing the same may be understood more readily by reference tothe following detailed description of the exemplary embodiments and theaccompanying drawings. The present invention may, however, beexemplarily embodied in many different forms and should not be construedas being limited to the exemplary embodiments set forth herein. Rather,these exemplary embodiments are provided so that this disclosure will bethorough and complete and will fully convey the concept of the inventionto those skilled in the art, and the present invention will only bedefined by the appended claims. Like reference numerals refer to likeelements throughout the specification.

Hereinafter, the present invention is described by referring to blockdiagrams and flow charts which explain the exemplary embodiments of theapparatus and the method to prevent data loss of a nonvolatile memory.Here, each block of the flow charts and combinations of the flow chartscan be executed using computer program instructions. Since such computerprogram instructions can be loaded into a personal computer, acustomized computer, and other processors of data processing deviceswhich can be programmed, the instructions executed by a computer or aprocessor of a data processing device which can be programmed can serveas a means to execute the functionality described in the blocks of theflow charts. Such computer program instructions can be loaded into acomputer to implement a function in a specific manner. Also suchcomputer program instructions can be loaded on a memory that can be usedor read by a computer or a computer that includes a programming dataprocessing device.

The instructions stored in a memory that can be used or read by acomputer can be used to produce a manufacturing product including theinstructions that executes the functionality described in the flowblocks. Since computer program instructions can be loaded on a computeror other programmable data processing devices, instructions executed ina computer or other programmable data processing device can providesteps to execute functionalities described in the flow blocks.

Also, each block can represent a module, a segment, or a part of codethat includes more than one instruction that executes a specific logicfunctions. Note that in some examples of alternative executionsfunctions mentioned in blocks can be executed out of order. That is,adjacent two blocks can be executed in parallel, or they can be executedin reverse order depending on the functionality of each of the blocks.

FIG. 4 is a block diagram illustrating an apparatus to prevent data lossof a nonvolatile memory according to the exemplary embodiment of thepresent invention.

As shown in FIG. 4, an apparatus 100 to prevent data loss of anonvolatile memory according to an exemplary embodiment of the presentinvention can include a nonvolatile memory 110, a data-processing unit120, and a data-recovery unit 130.

The nonvolatile memory 110 is an MLC nonvolatile memory, which includesa memory cell to store data in multiple pages using multiple statesimplemented by at least two bits, is used as an example.

For example, when a memory cell in the MLC nonvolatile memory storesdata of multiple pages using two bits, the pages that store data bitsusing the same memory cell are called binded pages. A memory cell canstore data in the binded least significant bit (LSB) page and the mostsignificant bit (MSB) page among the pages included in a certain block.Thus, the LSB page and the MSB can be located in a random fashion.Although the exemplary embodiment of the present invention provides anexample where data bits are stored using four states, which can beimplemented using a two bit memory cell, it should be considered as anexample to aid understanding of the present invention, and data bits canbe stored in the multiple pages using the multiple states which can beimplemented using more than two bits.

For example, in case of a two level MLC nonvolatile memory where memorycells stores data into multiple pages using 2 bits, as shown in FIG. 5,the identical memory cell is used for a (4N+0)th page and a (4N+2)thpage. In this case, the LSB page is the (4N+0)th page and the MSB pageis the (4N+2)th page.

Also, the nonvolatile memory 110 according to the exemplary embodimentof the present invention can include a first region 111 that storesdata, a second region 112 where the data stored in the first region 111is stored by the data-processing unit 120 described in the followingsection, and a third region 113 including free blocks. Here, the firstregion 111, the second region 112, and the third region 113 can includeat least one block.

The data-processing unit 120 stores data into the first region 111 ofthe nonvolatile memory 110. Since the MLC nonvolatile memory is used asan example of the nonvolatile memory 110 according to the exemplaryembodiment of the present invention, the data-processing unit 120 storesdata in the LSB page corresponding to one memory cell, and then storesdata in the MSB page, which shares the memory cell with the LSB page.

The data-processing unit 120 determines whether the page to be writtento is the LSB or the MSB page. If the page being written is the LSBpage, data is written to the page. If the page being written is the MSBpage, data stored in the binded LSB page is stored in the second regionof the nonvolatile memory 110.

As described above, when the data-processing unit 120 writes data to theMSB page, the data stored in the binded LSB page, which is not to bewritten, is stored in the second region 112. This is to prevent dataloss in the binded LSB page which can occur during the data write intothe binded MSB page.

In more detail, in order to change the state of a memory cell from 11 to01, when an error occurs during the memory cell state transition from 11to 10, the data bit of the LSB page changes to 0 from the correct valueof 1. Also, when an error occurs during the memory cell state transitionfrom 11 to 00, the data bit of the LSB page changes to 0 from thecorrect value of 1.

Therefore, according to the exemplary embodiment of the presentinvention, when the data-processing unit 120 writes data into the MSBpage, the data-processing unit 120 writes data stored in the binded LSBpage into the second region 112 of the nonvolatile memory 110. This isto prevent data loss of the other page that can be caused by an erroroccurred during data write into one of the binded pages in the MLCnonvolatile memory that shares a memory cell.

Also, since the data-processing unit 120 writes data stored in the LSBpage into the second region 112 in the nonvolatile memory 110 where datacan be maintained, data can be safely recovered in a situation where avoltage supply is suddenly off.

The data-recovery unit 130 can recover data when an error occurs duringa write to one of the binded LSB and MSB pages by the data-processingunit 120.

In more detailed descriptions, when an error occurs during data writeinto the binded LSB page, the data-recovery unit 130 copies valid pagesin the corresponding LSB page into a free block allocated in the thirdregion 113.

Also, when an error occurs during data write into the binded MSB page,the valid page in the MSB page is copied into a free block allocatedfrom the third region 113 and the binded LSB page is copied into a freeblock allocated from the second region 112 by the data-recovery unit130. When the data-processing unit 120 writes data into the MSB page,the data stored into the binded LSB page is written into the secondregion 112. Therefore, data stored in the binded LSB page can be safelyrecovered in the case of an error in the MSB page.

FIG. 6 is a flow chart illustrating a method to write data into anonvolatile memory according to an exemplary embodiment of the presentinvention. The method to write data shown in FIG. 6 is explained withthe assumption that a write to a nonvolatile memory is requested by auser.

As shown in FIG. 6, the data write method according to the exemplaryembodiment of the present invention includes the first operation where adata-processing unit 120 writes data into a certain LSB page S110. Inthis operation, the LSB page which is written by the data-processingunit 120 can be predetermined or random.

The data-processing unit 120 decides if an error has occurred duringwriting data to the LSB page S120, and copies the valid data in thecorresponding LSB page to the free block allocated in a third region 113of the nonvolatile memory 110 if there is an error S130. If the datawrite is successful, data is written to the MSB page, which is bindedwith the LSB page in the S110 operation S140.

In this operation, the data-processing unit 120 writes data into the MSBpage. At the same time, it writes data written into the LSB page inoperation S110 into a block in a second region 112 of the nonvolatilememory 110.

As described above, the data-processing unit 120 writes data stored inthe binded LSB page into the second region 112 during data write intothe MSB page to prevent data loss of the LSB page containing correctdata during the MSB page write.

FIG. 7 is a flow chart illustrating a data recovery method in anonvolatile memory according to an exemplary embodiment of the presentinvention. The data recovery method shown in FIG. 7 can be understood asa method to recovery data after the voltage supply is cut during datawrite to the nonvolatile memory.

As shown in FIG. 7, the data recovery method according to the exemplaryembodiment of the present invention includes the first step where adata-recovery unit 130 scans a first region 111 of the nonvolatilememory 110 S210.

After data scanning, the data-recovery unit 130 decides if there is apage that contains an error. If it finds the page with the error S220 itdecides if the page with the error is a MSB page S230. In thisoperation, the data-recovery unit 130 can decide the page with an errorusing a mark value stored at the end of the data write into thecorresponding page, however, since this can be an example to aidunderstanding of the present invention it is not limited to such method.

If the error occurs in the MSB page, the data-recovery unit 130 copies avalid page to a predetermined free block allocated in a third region 113S240, and recovers the data in the LSB page, which shares the memorycell with the MSB page having the error by copying the data in a secondregion 112 S250. The recovery data for the LSB page is copied from thesecond region 112 because as described in FIG. 6 the binded LSB pagedata is copied to the second region 112 during writing of the MSB pagedata.

Therefore, the device and the method to prevent data loss in anonvolatile memory according to the exemplary embodiments of the presentinvention can prevent data loss in one page that can be caused by anerror occurring during data write to one of the pages that shares amemory cell. Also, only the LSB page can be used to prevent data loss inthe LSB page due to the MSB page error, however, this method onlyutilizes half of the nonvolatile memory space. Thus, with the reuse ofthe second region the present invention achieves close to 100%utilization of the nonvolatile memory space.

The second region 112 can be used to store only particular data ratherthan to store an entire page. In this case, overhead to store the LSBpage data to the second region 112 can be reduced.

The terminology “unit” used in the exemplary embodiments of the presentinvention represents a hardware component including a Field ProgrammableGate Array (FPGA) and an Application Specific Integrated Circuit (ASIC)and executes particular operations. However, the terminology “unit” isnot limitative to hardware or software. The unit can be constructed tobe stored into addressable storage device or can be constructed toexecute one or more processors. For example, the unit can includesoftware components, object oriented software components, classcomponents, and task components. The unit also can include processes,functions, attributes, procedures, subroutines, segments of programcodes, drivers, firmware, microcode, circuit, data, database, datastructures, tables, arrays, and variables. Functions provided bycomponents and units can be combined into smaller number of componentsand units or can be further divided into additional components andunits.

While the present invention has been particularly shown and describedwith reference to exemplary embodiments thereof, it will be apparent tothose skilled in the art that the scope of the invention is given by theappended claims, rather than the preceding description, and allvariations and equivalents which fall within the range of the claims areintended to be embraced therein. Therefore, it should be understood thatthe above embodiments are not limitative, but illustrative in allaspects.

As described above, according to the apparatus and the method to preventdata loss in a nonvolatile memory of the present invention, one or morethan one of the following effects can be observed.

In the MLC nonvolatile memory the LSB page data is stored in anotherregion, which prevents data loss in the LSB page due to the MSB pageerror.

Also, in case of the MLC nonvolatile memory, the MLC nonvolatile memoryutilization can be improved since the data loss in the LSB page due tothe MSB page error can be avoided.

What is claimed is:
 1. An apparatus to prevent data loss in anonvolatile memory device, comprising: a nonvolatile memory comprising amemory cell which writes bit information to a first page and a secondpage included in a first block using plural states which are implementedusing at least 2 bits; and a data-processing unit which writes the bitinformation of the first page to a second block in the nonvolatilememory while the bit information is written to the second page after thebit information is written to the first page, wherein the nonvolatilememory is partitioned into at least three regions in which the firstblock belongs to a first region, the second block belongs to the secondregion, and the third region comprises at least one third block whichstores a copy of the first page written to the second block in thenonvolatile memory.
 2. The apparatus of claim 1, wherein the first pageis a least significant bit (LSB) page and the second page is a mostsignificant bit (MSB) page.
 3. The apparatus of claim 1, wherein thenonvolatile memory represents the bit information of the first page andthe second page using four states which are implemented using 2 bits. 4.The apparatus of claim 1, wherein the data-processing unit writes dataif the page to be written is the first page, and the data-processingunit writes data written to the first page to the second block if thepage being written is not the first page.
 5. The apparatus of claim 4,wherein the data-processing unit copies an existing valid page to a freeblock in the nonvolatile memory when an error occurs during data writeto the first page.
 6. The apparatus of claim 1, further comprising adata-recovery unit which recovers the data of the nonvolatile memoryusing the data written to the second block.
 7. The apparatus of claim 6,wherein the data-recovery unit scans the first block of the nonvolatilememory, and determines, if the page contains an error, which page is thepage with an error between the first page and the second page.
 8. Theapparatus of claim 7, wherein the data-recovery unit copies a valid pageof an existing block to a free block in the nonvolatile memory, andcopies the first page from the second block to the free block if thepage with the error is the second page.
 9. The apparatus according toclaim 1, wherein the nonvolatile memory comprises only multi-levelcells.
 10. The apparatus according to claim 1, wherein the nonvolatilememory comprises only cells in which states are represented with atleast two bits.
 11. The apparatus according to claim 1, wherein the dataprocessing unit copies a valid page to the second region of thenonvolatile memory when error occurs and wherein the data processingunit stores recovered pages along with the corresponding valid pagestored in the second region in the third region and wherein the thirdregion has free blocks.
 12. The apparatus according to claim 1, whereinthe data processing unit writes the bit information of the first andsecond pages into the first region of the nonvolatile memory, whereinthe second region is a backup region comprising blocks for copying thebit information written in the first region, and wherein the thirdregion comprises free blocks.
 13. A method to prevent data loss in anonvolatile memory device, comprising: writing data to a first page in anonvolatile memory comprising a memory cell which writes bit informationto a first page and a second page included in a first block using pluralstates implemented using at least 2 bits; and writing the data of thefirst page to a second block of the nonvolatile memory during datawriting to the second page after the data is written to the first page,wherein the nonvolatile memory is partitioned into at least threeregions in which the first block belongs to a first region, the secondblock belongs to the second region, and the third region comprises atleast one third block which stores a copy of the first page written tothe second block in the nonvolatile memory.
 14. The method of claim 13,wherein the first page is a least significant bit (LSB) page and thesecond page is a most significant bit (MSB) page.
 15. The method ofclaim 13, wherein the nonvolatile memory represents the bit informationof the first page and the second page using four states implementedusing 2 bits.
 16. The method of claim 13, wherein writing the data ofthe first page to the second block includes writing the data if the pageto be written is the first page, and writing the data written in thefirst page to the second block if the page being written is not thefirst page.
 17. The method of claim 16, wherein writing the data writtenin the first page to the second block includes copying an existing validpage to a free block in the nonvolatile memory when an error occursduring data write to the first page.
 18. The method of claim 13, furthercomprising recovering data of the nonvolatile memory using the datawritten to the second block.
 19. The method of claim 18, wherein therecovering data includes scanning a data block in the nonvolatile memoryand determining, if the page contains an error, which of the first pageand the second page contains the error.
 20. The method of claim 19,wherein the recovering data includes copying a valid page of an existingblock to a free block in the nonvolatile memory and copying the firstpage from the second block to the free block if the page with the erroris the second page.